如何为临时目录中生成的obj文件创建makefile目标?

我正在尝试再次学习使用makefiles。我的目录结构如下:

build
  |- Makefile
  |- Project files, like visual studio project
tmp
  |- $(os name)_$(compiler)
    |- *.o and any other intermediate files
bin
  |- $(os name)_$(compiler)
    |- the compiled binary executable
    |- debug info, if any
src
  |- *.cpp, *.h

所以我做了这个 Makefile 经过一番谷歌搜索和试验:

CXX      := g++
CXXFLAGS := -std=c++17 -Wall
LDFLAGS  := -lpthread
ASSUMED_OS := unknownOS
SRC_DIR := ../src

EXTENSION :=

# OS detection and extension assignment for windows redacted for brevity
# ... detect OS, set extension to .exe if windows

COMPILE_PATH := $(ASSUMED_OS)_gcc
TMP_DIR := ../tmp/$(COMPILE_PATH)

TARGET_DIR := ../bin/$(COMPILE_PATH)
TARGET := $(TARGET_DIR)/MyProject$(EXTENSION)

# $(wildcard *.cpp /xxx/xxx/*.cpp): get all .cpp files from the current directory and dir "/xxx/xxx/"
SRCS := $(wildcard $(SRC_DIR)/*.cpp)
# $(patsubst %.cpp,%.o,$(SRCS)): substitute all ".cpp" file name strings to ".o" file name strings
OBJS := $(patsubst %.cpp,%.o,$(SRCS))

all: $(TARGET)

# Compile all obj files into an executable
$(TARGET): $(OBJS)
    @mkdir -p $(@D)
    $(CXX) -o $@ $^ $(LDFLAGS)
# Compile all CPP files in separate obj files
%.o: %.cpp
    @mkdir -p $(@D)
    $(CXX) $(CXXFLAGS) -c $< -o $@
clean:
    rm -rf $(TARGET) ../*.o

.PHONY: all clean

这是有效的,但它创造了 .o 源旁边的文件。

所以我试着改变 OBJS 变量,并替换路径:

OBJS := $(patsubst %.cpp,%.o,$(SRCS))
# Substitute src path for tmp directory path
OBJS := $(patsubst $(SRC_DIR)/%,$(TMP_DIR)/%,$(OBJS))

但后来我得到了一个错误:

make: *** No rule to make target '../tmp/linux_gcc/Job.o', needed by '../bin/linux_gcc/MyProject'.  Stop.

所以我尝试创建一个不同的目标,我认为它可以映射应该在 ../tmp/linux_gcc 到源名称 ../src :

# $(wildcard *.cpp /xxx/xxx/*.cpp): get all .cpp files from the current directory and dir "/xxx/xxx/"
SRCS := $(wildcard $(SRC_DIR)/*.cpp)
# $(patsubst %.cpp,%.o,$(SRCS)): substitute all ".cpp" file name strings to ".o" file name strings
OBJS := $(patsubst %.cpp,%.o,$(SRCS))
# Substitute src path for tmp directory path
OBJS := $(patsubst $(SRC_DIR)/%,$(TMP_DIR)/%,$(OBJS))
all: $(TARGET)

# Compile all obj files into an executable
$(TARGET): $(OBJS)
    @mkdir -p $(@D)
    $(CXX) -o $@ $^ $(LDFLAGS)
# Compile all CPP files in separate obj files
$(OBJS): $(SRCS)
    @mkdir -p $(@D)
    $(CXX) $(CXXFLAGS) -c $< -o $@

但当我这样做的时候,make总是编译相同的 cpp 每个的文件 .o 文件:

g++ -std=c++17 -Wall -c ../src/Job.cpp -o ../tmp/linux_gcc/Job.o
g++ -std=c++17 -Wall -c ../src/Job.cpp -o ../tmp/linux_gcc/Worker.o
g++ -std=c++17 -Wall -c ../src/Job.cpp -o ../tmp/linux_gcc/WorkManager.o

我想我已经很接近了,但我该怎么做呢?我认为在compile命令中 $(CXX) $(CXXFLAGS) -c $< -o $@ 我需要别的东西 $< 输入文件,但我不确定是什么。