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#中断单元是2,但中断是3元组

  •  3
  • Jimbo  · 技术社区  · 8 年前

    我正在查看设备树,查找Beagle Bone Black,并从 am57xx-beagle-x15.dts .深入研究 dra7.dtsi 我发现 gpio1 :

    gpio1: gpio@4ae10000 {
                compatible = "ti,omap4-gpio";
                reg = <0x4ae10000 0x200>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                ti,hwmods = "gpio1";
                gpio-controller;
                #gpio-cells = <2>;
                interrupt-controller;
                #interrupt-cells = <2>;
            };
    

    我读过 #interrupt-cells 给出了一个项目中的U32或单元格的数量 interrupts 列表但当我看着 打断 我看到一个三元组: <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH> .我很想知道,为什么这个包含3个细胞而不是2个?

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        1
  •  1
  •   Chan Kim    4 年前

    这是一个很晚的答案,但添加一个,以便有人可以得到帮助。
    我无法从当前的linux 5.15源代码中找到确切的dts文件。但是,节点的中断父节点应该需要3个单元来实现interrupts属性。对于gic,通常需要3个值{中断类型、中断编号、标志}。它位于gic的设备绑定文档中(Documentation/devicetree/bindings/interrupt controller/arm,linux 5.15中的gic.yaml)

      "#interrupt-cells":
        const: 3
        description: |
          The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
          interrupts.
    
          The 2nd cell contains the interrupt number for the interrupt type.
          SPI interrupts are in the range [0-987].  PPI interrupts are in the
          range [0-15].
    
          The 3rd cell is the flags, encoded as follows:
            bits[3:0] trigger type and level flags.
              1 = low-to-high edge triggered
              2 = high-to-low edge triggered (invalid for SPIs)
              4 = active high level-sensitive
              8 = active low level-sensitive (invalid for SPIs).
            bits[15:8] PPI interrupt cpu mask.  Each bit corresponds to each of
            the 8 possible cpus attached to the GIC.  A bit set to '1' indicated
            the interrupt is wired to that CPU.  Only valid for PPI interrupts.
            Also note that the configurability of PPI interrupts is IMPLEMENTATION
            DEFINED and as such not guaranteed to be present (most SoC available
            in 2014 seem to ignore the setting of this flag and use the hardware
            default value).
    
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